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Latest / Chips, compute and energy

ResearchComputeJapanConfirmed

Rapidus shows working 2nm GAA transistors from its Hokkaido pilot fab

See how this story connects

Source: RapidusAlso reported by DIGITIMES

Rapidus said on 18 July 2025 that prototype wafers from its IIM-1 fab in Chitose, Hokkaido, had started to show working electrical characteristics for 2nm gate-all-around transistors. The fab took Japan’s first advanced EUV tool in December 2024, completed its first EUV exposure on 1 April 2025 and had more than 200 tools connected by June 2025. Rapidus plans to give early customers a process design kit by the first quarter of 2026 and to start mass production in 2027.

Why it matters

Japan’s state-backed bid to make leading-edge AI chips at home produced working 2nm transistors. Chip designers could have a non-Taiwan source of 2nm production from 2027.

When
18 Jul 2025
ID
WTA-N-2025-0084
Where
Japan
Who
Rapidus

Summary by wheresthe.ai, from Rapidus and the reporting credited above. Checked against the source on 9 Oct 2026.

Read the original at Rapidus

Source copy: download the page as saved on 18 Oct 2026 (PDF). Also held by the Internet Archive.

Next stop on this Storyline: What happened nextTSMC confirms its 2nm chips entered volume production in Q4 2025

Cite this story

WTA-N-2025-0084: “Rapidus shows working 2nm GAA transistors from its Hokkaido pilot fab.” wheresthe.ai, 18 Jul 2025. https://wheresthe.ai/d/jp-rapidus-2nm-gaa-prototype-2025-07/ (source: Rapidus).

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